Cypress Launches Worldwide Seminar Series on Programmable Logic, USB and Programmable Clock Devices
SAN JOSE, Calif.----Sept. 6, 2000--
Cypress Semiconductor (NYSE:CY) today announced its worldwide
seminar series on programmable devices, ``Connecting Your Programmable
World,'' to be held from September 21 through October 26, 2000 in 42
cities in the United States, Asia and Europe. The one-day, no-cost
seminars will consist of three technical sessions on reducing cost and
decreasing time-to-market using Cypress's programmable logic, USB and
programmable clock devices.
During the seminar, participants will learn how to accomplish
design goals through programmability. Presenters will discuss the
benefits of using CPLDs at FPGA densities(TM), the devices that are
leading the USB revolution -- including USB 2.0 -- and how the
industry's leading timing solutions can drive successful designs.
Lunch will be provided for the attendees.
Seminar Series Schedule
September 21 Thursday San Jose, CA
September 26 Tuesday Raleigh, NC; Dallas, TX
September 27 Wednesday Atlanta, GA; Houston, TX
September 28 Thursday Huntsville, AL; Austin, TX
October 2 Monday Tokyo, Japan
October 3 Tuesday Seattle, WA; Osaka, Japan
October 4 Wednesday Portland, OR
October 5 Thursday Sacramento, CA; Taipei, Taiwan
October 9 Monday Seoul, Korea
October 10 Tuesday Phoenix, AZ; Cedar Rapids, IA; London,
England
October 11 Wednesday San Diego, CA; Minneapolis, MN;
Beijing, China; Paris, France
October 12 Thursday Orange County, CA; Antwerp, Belgium
October 13 Friday Los Angeles, CA; Shanghai, China
October 16 Monday Orlando, FL; Shenzhen, China
October 17 Tuesday Chicago, IL; Stockholm, Sweden
October 18 Wednesday Washington,DC; Cleveland, OH;
Frankfurt, Germany
October 19 Thursday Philadelphia, PA; Pittsburgh, PA;
Bangalore, India; Munich, Germany
October 24 Tuesday Iselin, NJ; Denver, CO; Milan, Italy
October 25 Wednesday Boston, MA
October 26 Thursday Ottawa, Canada; San Jose, CA;
Tel Aviv, Israel
Registration
Attendees can register at Cypress Semiconductor's Website at
www.cypress.com/progprods/seminar, or by calling 425/398-3454 (all
attendees), 877-CYPRESS (U.S. attendees only) or their local Cypress
office. Participants that register at least seven days before the
seminar of their choice will receive a free optical mouse.
About Cypress
Cypress Semiconductor provides high-performance integrated circuit
solutions ``By Engineers. For Engineers.(TM)'' for fast-growing
companies in fast-growing markets, including data communications,
telecommunications, computation, consumer products, and
industrial-control. With a focus on emerging communications
applications, Cypress's product lines include networking-optimized and
micropower static RAMs; high-bandwidth multi-port and FIFO memories;
high-density programmable logic devices; timing technology for PCs and
other digital systems; and controllers for Universal Serial Bus (USB).
Cypress is No. 1 in the USB and clock chip markets.
More than two-thirds of Cypress's sales come from fast-growing
communications markets and dynamic companies such as Alcatel, Cisco,
Ericsson, Lucent, Motorola, Nortel Networks, and 3Com. Cypress's
ability to mix and match its broad portfolio of intellectual property
enables targeted, integrated solutions for high-speed systems that
feed bandwidth-hungry Internet applications. Cypress aims to become
the preferred silicon supplier for Internet switching systems and for
every Internet data stream to pass through at least one Cypress IC.
Cypress employs more than 4,100 people worldwide with
international headquarters in San Jose, California. Its shares are
listed on the New York Stock Exchange under the symbol CY. More
information about Cypress is accessible electronically on the
company's worldwide web site at http://www.cypress.com or by CD-ROM
(call 800/858-1810). An electronic investor forum, and other investor
information, is located at http://www.cypress.com/investor/index.html.
``Safe Harbor'' Statement under the Private Securities Litigation
Reform Act of 1995: Statements herein that are not historical facts
are ``forward-looking statements'' involving risks and uncertainties.
Please refer to Cypress's Securities and Exchange Commission filings
for a discussion of such risks.
Note to Editors: ``CPLDs at FPGA densities'' and ``By Engineers. For
Engineers'' are trademarks of Cypress Semiconductor.
Contact:
Cypress Semiconductor, San Jose
Louie Yan, 408/943-2817
LRY@cypress.com
|
